What does the “gate” input do on the PCO-6141?
A CMOS high level (+5 V +/-1 V) into pin 8 (gate) starts the pulse. That is, the leading edge of the gate signal causes the shunt to be removed and the loop current diverted to the load instead.
The PCO-6141 must not be enabled and gated at the same time. It must first be enabled, then a ramp-up delay observed before it can generate pulses. The delay allows the internal loop current to build up before it is needed to drive the load.